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    (comment 1 "ENGINEERING DRAFT - see release status before fabrication"))
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      (xy 99.06 195.58)
      (xy 99.06 144.78)))
  (global_label "GND"
    (shape passive)
    (at 76.2 195.58 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 76.2 195.58 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 157.48 110.49)
      (xy 157.48 139.7)))
  (wire
    (pts
      (xy 157.48 139.7)
      (xy 179.07 139.7)))
  (global_label "PWM_08"
    (shape passive)
    (at 157.48 139.7 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 157.48 139.7 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 186.69 139.7)
      (xy 198.12 139.7)))
  (wire
    (pts
      (xy 198.12 139.7)
      (xy 213.36 139.7)))
  (global_label "GATE_08"
    (shape passive)
    (at 198.12 139.7 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 198.12 139.7 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 198.12 139.7)
      (xy 198.12 168.91)))
  (wire
    (pts
      (xy 198.12 176.53)
      (xy 198.12 195.58)))
  (wire
    (pts
      (xy 198.12 195.58)
      (xy 220.98 195.58)))
  (wire
    (pts
      (xy 220.98 195.58)
      (xy 220.98 144.78)))
  (global_label "GND"
    (shape passive)
    (at 198.12 195.58 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 198.12 195.58 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 279.4 110.49)
      (xy 279.4 139.7)))
  (wire
    (pts
      (xy 279.4 139.7)
      (xy 300.99 139.7)))
  (global_label "PWM_09"
    (shape passive)
    (at 279.4 139.7 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 279.4 139.7 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 308.61 139.7)
      (xy 320.04 139.7)))
  (wire
    (pts
      (xy 320.04 139.7)
      (xy 335.28 139.7)))
  (global_label "GATE_09"
    (shape passive)
    (at 320.04 139.7 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 320.04 139.7 0.0)
      (hide yes)))
  (wire
    (pts
      (xy 320.04 139.7)
      (xy 320.04 168.91)))
  (wire
    (pts
      (xy 320.04 176.53)
      (xy 320.04 195.58)))
  (wire
    (pts
      (xy 320.04 195.58)
      (xy 342.9 195.58)))
  (wire
    (pts
      (xy 342.9 195.58)
      (xy 342.9 144.78)))
  (global_label "GND"
    (shape passive)
    (at 320.04 195.58 0)
    (property "Intersheetrefs" "${INTERSHEET_REFS}"
      (at 320.04 195.58 0.0)
      (hide yes)))
  (junction
    (at 76.2 139.7)
    (diameter 0)
    (color 0 0 0 0))
  (junction
    (at 198.12 139.7)
    (diameter 0)
    (color 0 0 0 0))
  (junction
    (at 320.04 139.7)
    (diameter 0)
    (color 0 0 0 0))
  (text "ZONE 3"
    (at 20.32 15.24 0))
  (text "24 V common positive; three independent low-side sinks.\nCentral J2 on central_led_interface: +24 V pins 26/27; W 28; N 29; C 30."
    (at 20.32 27.94 0))
  (text "WARM / channel 7"
    (at 35.56 71.12 0))
  (text "NEUTRAL / channel 8"
    (at 157.48 71.12 0))
  (text "COOL / channel 9"
    (at 279.4 71.12 0))
  (text "GATE_BIAS is removed by U13 when LIGHT_ENABLE_SAFE is low.\nPCA9685: open-drain; disabled output LOW. Firmware duty encoding requires verification."
    (at 20.32 226.06 0))
  (embedded_fonts no))
